I'm testing S3 (Suspend to DRAM) on Bay Trail E3845 platforms. On Cedarview the DRAM was set to low power self refresh mode by the chipset. How does it work on Bay Trail? The MRC code runs succesfully all the steps for S3, but DRAM does not work.
I think it fails to put the DRAM to low power self refresh mode. The question is how to do that? Are there any documentation or reference code for it?
Best regards,
B-O